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Introduction
The advancement in process technology has greatly enhanced the design and ability of integrated circuits to implement complex systems on a single chip. This advancement, however, has caused rapid increase in the design complexities of Embedded Systems. These complexities involve the optimized design of embedded systems in terms of area, speed and power consumption. As a result, new methodologies and tools are required to address these design issues. Our research group targets different design, test and verification issues that are associated to Embedded Systems.
Real-Time Embedded Systems Research Stream
Real-time embedded systems have become very significant in the recent times and are seen everywhere from mobile phones, computer tablets up to the automobiles and space systems. This new scenario of technology constantly requires for an increase in the processing power. Multiprocessor system is one of the solutions which addresses to this problem. Another topic that is directly linked to multiprocessing is multiprocessor scheduling. Primarily with the advent of multi-core architecture and secondly with the proposition of optimal scheduling algorithms, the domain has got overwhelming attention of the researchers.
In our research group, we are working on optimal global scheduling algorithms. Theoretically the optimal global scheduling algorithms achieve higher utilization of processors resource than partitioned scheduling algorithms but practically they are considered inferior because they incur a large amount of overhead. This overhead constitutes frequent scheduling points, migrations and preemptions. We are trying to reduce this overhead using different techniques. Energy constrained scheduling is also an area of interest.
Reconfigurable Computing Research Stream
The second part of EmSys research group mainly targets the reconfigurable architectures. This part of the EmSys group will mainly focus on the architecture design of next generation Field Programmable Gate Arrays (FPGAs) and Computer Aided Design (CAD) of the algorithms that map different circuits on FPGAs. An FPGA is basically a generalized, reconfigurable device that can be used to implement almost any kind of digital circuit. They were introduced almost two decades ago and since then they have seen a rapid growth both in terms of capacity and market. This is largely because of their reconfigurable and generalized nature. However, there are certain disadvantages associated to FPGAs (large area, poor performance, high power consumption as compared to their ASIC counterparts) that make them unsuitable for application requiring high density, performance and low power consumption. The main goal of this research group is to improve FPGAs by both enhancing their internal structure (architecture) and the associated CAD algorithms.
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