Dr. Umer Farooq
Assistant Professor, Electrical Engineering
Area of Interest: Embedded Systems, Reconfigurable Architectures, CAD Tools, Optimization of Placement/Partitioning and Routing Algorithms
Tel # (Off): 111-001-007   (169)
HEC approved PhD Supervisor
Served Previously

Short Biography

Umer Farooq is an Assistant Professor at the Electrical Engineering department of COMSATS Institute of Information Technology Lahore, Pakistan. Currently, he is on post-doc leave.

Umer Farooq received the B.E in Electrical Engineering from University of Engineering and Technology Lahore, Pakistan in 2004, the M.Sc degree from Université de Nice Sophia Antipolis, France in 2007. He completed his PhD from System on Chip (SoC) department of Laboratoire d'Informatique de Paris6 (LIP6), Université Pierre et Marie Curie (UPMC), Paris France in july 2011. During his PhD, he worked on the exploration and optimization of application specific heterogeneous tree-based FPGA Architectures. 

Research Interests

  • Embedded Systems, Reconfigurable Architectures, CAD Tools for FPGAs
  • System on Chip Architectures
  • Real time embedded systems
  • Design, Exploration and Optimization of 
    • Homogeneous mesh-based and tree-based FPGA Architectures
    • Heterogeneous mesh-based and tree-based FPGA Architectures
    • Optimization and Customization of Placement/Partitioning and Routing algorithms for FPGA CAD tools

 MS Thesis Supervised

  • Development of an efficient power model for tree-based FPGA architectures (Thesis Defended in Fall 2015)
  • Efficient FPGA architecture based on memristor-transistor hybrid approach (Thesis Defended in Spring 2015)

Undergraduate Projects supervised

  • Custom OS based image editor using FPGA based embedded systems (Fall 2014)
  • Remote generator control using SCADA (Spring 2014)
  • Efficient implementation of Advanced Encryption Standard (AES) Encryptor/Decryptor algorithm on FPGA and its comparison with Data Encryption Standard Algorithm (Students passed out in Spring 2013)
  • Implementation of SCADA on power distributed systems (Students passed out in Fall 2012)

Teaching Assignments

Spring 2015  
  • ECI614 (Advanced Computer Architecture)
  • ECI610 (Advanced Digital Design)
 

Publications:

Books:
1. Umer Farooq, Zied Marrakchi, Habib Mehrez (2012), "Tree-based Heterogeneous FPGA Architectures: Application Specific Exploration and Optimization", published by: Springer, pp: 202, Standard: 978-1-4614-3593-8    (External URL)
Book Chapters:
1. M. Adeel Pasha, Umer Farooq, Muhammad Ali, Bilal Siddiqui (2017), "A Framework for High Level Simulation and Optimization of Coarse-Grained Reconfigurable Architectures", Applied Reconfigurable Computing. ARC 2017. Lecture Notes in Computer Science, vol 10216. Springer, Cham, edited by: Stephen Wong, published by: Springer, pp: 129-137    (External URL)
2. Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez (2011), "Comparison Between Heterogeneous Mesh-based and Tree-based Application Specific FPGA", Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications (Proceedings indexed by ISI), edited by: Andreas Koch, published by: Springer-Verlag, pp: 12, Standard: 978-3-642-19474-0    (External URL)
Journal Papers:
1. Umer Farooq, M Faisal Aslam (2016), "Comparative Analysis of Different AES Implementation Techniques for Efficient Resource Usage and Better Performance of an FPGA", Elsevier Journal of Computer and Information Sciences, pp: 1--8, Vol: 2016    (External URL)
2. M Hassan Aslam, Umer Farooq, M Naeem Awais, M Khurram Bhatti, M Naeem Shehzad (2016), "Exploring the Effect of LUT Size on the Area and Power Consumption of a Novel Memristor-Transistor Hybrid FPGA Architecture", Arabian Journal of Science and Engineering, pp: 1--15, Standard: 2191-4281, Impact Factor: 0.73    (External URL)
3. Muhammad Naeem Awais, Maria Mustafa, Muhammad Naeem Shehzad, Umer Farooq, Mirza Tariq Hamayun, and Kyung Hyun Choi (2016), "Resistive-Switching and Current-Conduction Mechanisms in F8BT Polymer Resistive Switch", IET Micro and Nano Letters, Issue: 2016, Standard: 1750-0443, Impact Factor: 0.853    (External URL)
4. M Khurram Bhatti, Isil Oz, Konstantin Popov, Mats Brorsson, Umer Farooq (2016), "Scheduling of Parallel Tasks with Proportionate Priorities", Arabian Journal of Science and Engineering, pp: 1-17, Vol: 2016, Issue: 5, Impact Factor: 0.73    (External URL)
5. M Mubashir Hassan, Umer Farooq (2015), "Adaptive and ubiquitous video streaming over wireless mesh networks (In Press)", Elsevier Journal of Computer and Information Sciences    (External URL)
6. M Naeem Shehzad, A M Deplanche, Yvon Trinquet, Umer Farooq (2014), "Efficient Data generation for the testing of real-time multiprocessor scheduling algorithms", Przeglad Electrotechniczny2014, Impact Factor: 0.25   
7. Umer Farooq, Husain Parvez, Habib Mehrez, Zied Marrakchi (2013), "Exploration and optimization of a homogeneous tree-based application specific inflexible FPGA", Elsevier Microelectronics Journal, pp: 19, Vol: 2013, Standard: http://dx.doi.org/10.1016/j.mejo.2012.12.010,, Impact Factor: 0.8    (External URL)
8. Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez (2012), "A New Tree-based Application Specific FPGA and Its Comparison with Mesh-based Application Specific FPGA", Elsevier Journal of Microprocessors and Microsystems, pp: 31, Impact Factor: 0.7    (External URL)
9. Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez (2011), "Exploration of Heterogeneous FPGA Architectures", International Journal of Reconfigurable Computing, pp: 18, Vol: 2011, Standard: 10.1155/2011/121404, Impact Factor: 0.4    (External URL)
10. Zied Marrakchi, Hayder Mrabet, Umer Farooq, Habib Mehrez (2009), "FPGA Interconnect Topologies Exploration", International Journal of Reconfigurable Computing, pp: 13, Vol: 2009, Standard: 10.1155/2009/259837, Impact Factor: 0.4    (External URL)
Conference Papers:
1. Umer Farooq, Khurram Bhatti, Hassan Aslam (2016) "A Novel Heterogeneous FPGA Architecture Based on Memristor-Transistor Hybrid Approach", Design and Technology of Integrated systems in NanoScale Era    (External URL)
2. Umer Farooq, Roselyne Chotin-Avot, Moazam Azeem, Maminionja Ravoson, Habib Mehrez (2016) "Inter-FPGA Routing Environment for Performance Exploration of Multi-FPGA Systems", IEEE International conference on Rapid system Prototyping (RSP), pp: 1-7    (External URL)
3. Moazzam Azeem, Roselyne Chotin-Avot, Umer Farooq, Habib Mehrez (2016) "Multiple FPGAs based prototyping and debugging with complete design flow", IEEE International Conference on Design and Test (IDT), 2016    (External URL)
4. Umer Farooq, Roselyne Chotin-Avot, Moazam Azeem, Saqib Khan, Zouha Cherif, Maminionja Ravoson, Habib Mehrez (2016) "Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration", IEEE Euromicro conference on Digital System Design (DSD)    (External URL)
5. Adeel Pasha, Bilal Siddiqui, Umer Farooq (2015) "A Design-flow for High-Level Synthesis and Resource Estimation of Reconfigurable Architectures ", IEEE Design and Technology of Integrated Systems in Nanoscale Era 2015 (DTIS'15)    (External URL)
6. Umer Farooq, M. Hassan Aslam (2015) "Design and Implementation of Basic Building Blocks of FPGA using Memristor-Transistor Hybrid Approach", IEEE International Conference on Innovative Technologies in Computing (INTECH) 2015    (External URL)
7. Vinod Pangracious, Habib Mehrez, Zied Marrakchi, Umer Farooq, Nizar Beltaief (2014) "Exploration and Optimization of Heterogeneous Interconnect Fabric of 3D Tree-based FPGA", IEEE Design and Technology of Integrated systems in Nano Scale Era (Proceedings indexed by ISI), pp: 1-6, Standard: 10.1109/DTIS.2014.6850673    (External URL)
8. Vinod Pangracious, Habib Mehrez, Zied Marrakchi, Umer Farooq, Nizar Beltaief (2013) "Exploration Environment for 3D Heterogeneous Tree-based FPGA Architectures (3D HT-FPGA)", IEEE International Conference on Reconfigurable Computing and FPGAs (Proceedings indexed by ISI)    (External URL)
9. Vinod Pangracious, Umer Farooq, Zied Marrakchi, Habib Mehrez (2013) "High Performance 3-Dimensional Heterogeneous Tree-based FPGA architectures ", ACM sponsored international conference on FPGA world    (External URL)
10. Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez (2011) "Exploring the Effect of LUT and Arity Size on a Tree-based Application Specific Inflexible FPGA", IEEE International Conference on Design and Technology of Integrated Systems in nanoscale era (Proceedings indexed by ISI), pp: 6    (External URL)
11. Umer Farooq, Zied Marrakchi, Habib Mehrez (2010) "A New Datapath Oriented Tree-based FPGA Architecture", IEEE International Conference on Microelectronics (Proceedings indexed by ISI)    (External URL)
12. Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez (2010) "Exploration of heterogeneous FPGA architectures", RecoSoc, pp: 37-44, Standard: 978-3-86644-515-4    (External URL)
13. Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez (2009) "A New Tree-based Coarse-Grained FPGA Architecture", IEEE Internation Conference on PhD Research in Microelectronics    (External URL)
14. Zied Marrakchi, Umer Farooq, Husain Parvez, Habib Mehrez (2009) "Comparison of tree-based and mesh-based coarse-grained FPGA architectures", International Conference on Microelectronics (ICM), pp: 248-251    (External URL)
15. Husain Parvez, Zied Marrakchi, Umer Farooq, Habib Mehrez (2008) "A New Coarse-Grained FPGA Architecture Exploration Environment", IEEE International Conference on Field Programmable Technology, pp: 4    (External URL)
16. Umer Farooq, Zied Marrakchi, Hayder Mrabet, Habib Mehrez (2008) "The Effect of LUT and Cluster Size on a Tree-based FPGA Architecture", IEEE International Conference on Reconfigurable Computing, pp: 6    (External URL)

Qualification

Ph.D (Microelectronics)
LIP6, University of Pierre and Marie Curie, Paris, France
2011
   
M.S (Embedded Systems)
University of Nice, Sophia Antipolis, France
2007
   
B.E (Electrical Engineering)
University of Engineering and Technology, Lahore, Pakistan
2004
   

Experience

Assistant Professor
Electrical Engineering Department, COMSATS Institute of Information Technology, Lahore, Pakistan
2011 to Date
   
Research Associate
Laboratoire d'Informatique de Paris6 (LIP6), Universite Pierre et Marie Curie (UPMC), Paris, France
2007 to 2011
   
Intern
Ecole National Superieur de Science Appliqué et de Technologie (ENSSAT), Lannion, France
Feb 2007 to Aug 2007
   
Operation and Maintenance Engineer
Zhong Xing Telecom
2004 to 2005
   
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