1. |
Umer Farooq, Khurram Bhatti, Hassan Aslam (2016) "A Novel Heterogeneous FPGA Architecture Based on Memristor-Transistor Hybrid Approach", Design and Technology of Integrated systems in NanoScale Era
(External URL)
|
2. |
Umer Farooq, Roselyne Chotin-Avot, Moazam Azeem, Maminionja Ravoson, Habib Mehrez (2016) "Inter-FPGA Routing Environment for Performance Exploration of Multi-FPGA Systems", IEEE International conference on Rapid system Prototyping (RSP), pp: 1-7
(External URL)
|
3. |
Moazzam Azeem, Roselyne Chotin-Avot, Umer Farooq, Habib Mehrez (2016) "Multiple FPGAs based prototyping and debugging with complete design flow", IEEE International Conference on Design and Test (IDT), 2016
(External URL)
|
4. |
Umer Farooq, Roselyne Chotin-Avot, Moazam Azeem, Saqib Khan, Zouha Cherif, Maminionja Ravoson, Habib Mehrez (2016) "Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration", IEEE Euromicro conference on Digital System Design (DSD)
(External URL)
|
5. |
Adeel Pasha, Bilal Siddiqui, Umer Farooq (2015) "A Design-flow for High-Level Synthesis and Resource Estimation of Reconfigurable Architectures ", IEEE Design and Technology of Integrated Systems in Nanoscale Era 2015 (DTIS'15)
(External URL)
|
6. |
Umer Farooq, M. Hassan Aslam (2015) "Design and Implementation of Basic Building Blocks of FPGA using Memristor-Transistor Hybrid Approach", IEEE International Conference on Innovative Technologies in Computing (INTECH) 2015
(External URL)
|
7. |
Vinod Pangracious, Habib Mehrez, Zied Marrakchi, Umer Farooq, Nizar Beltaief (2014) "Exploration and Optimization of Heterogeneous Interconnect Fabric of 3D Tree-based FPGA", IEEE Design and Technology of Integrated systems in Nano Scale Era (Proceedings indexed by ISI), pp: 1-6, Standard: 10.1109/DTIS.2014.6850673
(External URL)
|
8. |
Vinod Pangracious, Habib Mehrez, Zied Marrakchi, Umer Farooq, Nizar Beltaief (2013) "Exploration Environment for 3D Heterogeneous Tree-based FPGA Architectures (3D HT-FPGA)", IEEE International Conference on Reconfigurable Computing and FPGAs (Proceedings indexed by ISI)
(External URL)
|
9. |
Vinod Pangracious, Umer Farooq, Zied Marrakchi, Habib Mehrez (2013) "High Performance 3-Dimensional Heterogeneous Tree-based FPGA architectures ", ACM sponsored international conference on FPGA world
(External URL)
|
10. |
Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez (2011) "Exploring the Effect of LUT and Arity Size on a Tree-based Application Specific Inflexible FPGA", IEEE International Conference on Design and Technology of Integrated Systems in nanoscale era (Proceedings indexed by ISI), pp: 6
(External URL)
|
11. |
Umer Farooq, Zied Marrakchi, Habib Mehrez (2010) "A New Datapath Oriented Tree-based FPGA Architecture", IEEE International Conference on Microelectronics (Proceedings indexed by ISI)
(External URL)
|
12. |
Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez (2010) "Exploration of heterogeneous FPGA architectures", RecoSoc, pp: 37-44, Standard: 978-3-86644-515-4
(External URL)
|
13. |
Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez (2009) "A New Tree-based Coarse-Grained FPGA Architecture", IEEE Internation Conference on PhD Research in Microelectronics
(External URL)
|
14. |
Zied Marrakchi, Umer Farooq, Husain Parvez, Habib Mehrez (2009) "Comparison of tree-based and mesh-based coarse-grained FPGA architectures", International Conference on Microelectronics (ICM), pp: 248-251
(External URL)
|
15. |
Husain Parvez, Zied Marrakchi, Umer Farooq, Habib Mehrez (2008) "A New Coarse-Grained FPGA Architecture Exploration Environment", IEEE International Conference on Field Programmable Technology, pp: 4
(External URL)
|
16. |
Umer Farooq, Zied Marrakchi, Hayder Mrabet, Habib Mehrez (2008) "The Effect of LUT and Cluster Size on a Tree-based FPGA Architecture", IEEE International Conference on Reconfigurable Computing, pp: 6
(External URL)
|